This issue is a bit downstream of my moteino, but there IS a moteino in the project so I'm hopefully still eligible to solicit advice from the very knowledgeable people here :D
Short summary of the issue is: my load switch p-fet is only outputting 500mV when it should be outputting VCC (3V). Schematic attached (except note that R5 is shorted and C9 is open, FOR NOW, while I test with a lab supply, and until I decide on an optimal slew rate). D5 is the load switch control, and D6 is the boost converter ENABLE control.
The load switch does correctly output 3V when:
- D5 LOW (Loadswitch ON), D6 LOW (Boost disabled). Or;
- D5 LOW (Loadswitch ON), D6 HIGH (Boost enabled), the boost converter's load (Vegetronix VH-400 sensor) removed or replaced with a 10kOhm resistor
Again, with the VH-400 connected + D5 low, then as soon as D6 is set HIGH the load switch output voltage nosedives. Note that in this condition the Source on the p-fet has not sagged and is still 3V.
My first thought was the current draw from the boost converter + sensor was too much for the p-fet and it was causing the output voltage to sag. So I tested the boost converter->VH400 with the following configuration: took my power supply and instead of powering the moteino 3.3V pin, I applied 3V directly to the drain of the p-fet (bypassing load switch). Boost converter then gave the correct 5V output and I measured a current draw of ~7mA between my supply and the boost converter VIN. The p-fet (http://www.nxp.com/documents/data_sheet/BSS84AK.pdf (http://www.nxp.com/documents/data_sheet/BSS84AK.pdf)) is rated for 180mA drain current, so this should be no issue.
What am I missing here?
I don't have any way on my PCB to measure current into the pfet from VCC, but I measured current into the moteino 3.3V pin and when I switch on the load switch and boost converter enable with VH400 connected, current consumption jumps from 5mA to 45mA. Why, if the boost converter + VH400 only draws 7mA, would there be a 40mA increase?
that does look weird. If you source 40mA through the Fet and drop 2.5V that implies a RDs of 63 ohm. Yet at a VGs of -3v it's spec'd to be more like 10 ohm. Gate voltage really is a full -3v and the Fet is really fully on?
Quote from: joelucid on May 15, 2016, 07:01:26 AM
that does look weird. If you source 40mA through the Fet and drop 2.5V that implies a RDs of 63 ohm. Yet at a VGs of -3v it's spec'd to be more like 10 ohm. Gate voltage really is a full -3v and the Fet is really fully on?
I'll double check my measurements but yes I think so.
Late last night I set up the following experiment with the VH400 connected:
Repeating sequence...
1) 10seconds D5 high, D6 low
2) 10seconds D5 low, D6 low
3) 10 seconds D5 low, D6 high
4) loop back to 1)
It gave me the usual low output at drain of p-fet. Then I jumper-ed between the drain and source on the p-fet for the duration of the sequence until reaching partway through step 3) at which point I yanked it. Drain voltage remained at 3V, boost output remained at 5V... Until the next cycle when it reverted to low output.
So I guess this indicates a startup problem? Maybe the inrush current is too much for the p-fet and so the voltage sags and this somehow causes the boost converter to draw an elevated current indefinitely because it can't stabilize with such a low supply? Perhaps the slew rate control will address this?
Dave, the problem is with your P-FET. It does not have a low enough Vgsth for this processor. If you look at the curve in figure 9 of the datasheet you referenced, you'll see the 'knee' is at around 4V. WAYYYYYY too high for a 3.0V signalling device. I recommend something like Si2365 or Si2347 which has a knee around 2V.
Also, I would suggest changing the gate resistor & gate souce capacitor to something like 20K & 0.1uF. There is a lot of unnecessary current expended with the lower values you're using. 20K & 0.1 will give you a nice smooth rise time on the drain without loading the processor GPIO pin.
Tom
Quote from: TomWS on May 15, 2016, 06:13:56 PM
Dave, the problem is with your P-FET. It does not have a low enough Vgsth for this processor. If you look at the curve in figure 9 of the datasheet you referenced, you'll see the 'knee' is at around 4V. WAYYYYYY too high for a 3.0V signalling device. I recommend something like Si2365 or Si2347 which has a knee around 2V.
Also, I would suggest changing the gate resistor & gate souce capacitor to something like 20K & 0.1uF. There is a lot of unnecessary current expended with the lower values you're using. 20K & 0.1 will give you a nice smooth rise time on the drain without loading the processor GPIO pin.
Tom
Hey Tom, thanks for chiming in. I'll be happy if it's just a matter of swapping the p-fet. I'd been reviewing possible p-fet candidates by looking at drain current versus Vgs (Based on Fig 10 it should pass 120mA with a -3V gate-source voltage) rather than RDSon vs Vgs. I've ordered the models you suggested and will try them out.
Cheers,
Dave
Quote from: davegravy on May 15, 2016, 06:42:46 PM
I'd been reviewing possible p-fet candidates by looking at drain current versus Vgs (Based on Fig 10 it should pass 120mA with a -3V gate-source voltage) rather than RDSon vs Vgs.
The P-FET probably WILL pass 120mA with a 3V Vgs - WITH a 3V drop across the FET! (look at figure 6). This doesn't help you very much...
The curve I try to find is the one that shows Rdson OR Ids vs Vgs. This will always show you where the 'knee' is and it's the knee that is the critical value when dealing with small voltage switching - Current is meaningless if you don't take into account the voltage drop across the FET. And Rdson is vital on a load sw (you want this as low as possible for efficiency's sake). Looking at Figure 9 again, I'd describe the knee more like 4.5V (where the knee flattens out).
Tom
QuoteSo I guess this indicates a startup problem? Maybe the inrush current is too much for the p-fet and so the voltage sags and this somehow causes the boost converter to draw an elevated current indefinitely because it can't stabilize with such a low supply? Perhaps the slew rate control will address this?
I think so. You've got to realize that the lower the input voltage of the booster the more current it needs to draw to provide a given output current at 5v. That's why it can't fix an Vin with a high resistance - a fact people trying to find a fix for the high internal resistance of a coin cell often overlook.
If I remember correctly the maximum power transfer happens at half of the input voltage. If it falls lower the booster won't be able to provide the needed power. (https://lowpowerlab.com/forum/index.php/topic,1283.msg8808.html#msg8808)
You could probably fix it with a larger cap at Vin to get over the startup hump. At 1.5v you only need 23mA after startup to provide 7mA at 5v Vout which I do think would work. Or just use a more suitable fet as Tom rightly suggests. Doesn't make much sense to burn off lots of energy in the fet.
Works much better with one of the p-fets Tom suggested. Thanks!