OK, thanks for the diagram.
Firstly the MCU has things called substrate diodes, basically these are diodes at an I/O pin that stop the voltage on it going above Vcc+0.3V or below GND-0.3V. If the input to A3 goes above the MCU's Vcc by 0.3V the diode will conduct, and the voltage at A3 will be clamped to Vcc + 0.3V. Let's ay your Vin is 6V and Vcc is 3.3V, this means the A3, and hence the gate, will be at 3.6V and current will flow through the resistor (in this case with a 10k resistor it will be about 240uA). It also means the FET will be permanently on.
There are two solutions to this, either place a capacitor in series at the A3 pin which will create a negative going pulse on the gate due to the RC constant it creates with the resistor, or use an open drain or open collector driver such as the N-channel FET to drive the gate. In either case you prevent voltages at the A3 pin going above Vcc+0.3V.
Also as you saw the capacitor will need to charge up, and the RC constant for that depends on the values of your potential divider resistors and the capacitor value. This constant is quite long in your diagram. If you are going to switch the supply you don't need high value resistors for this (and 100nF is probably excessive), it would be better to use maybe 10k and 4k7 resistors and a 10nF capacitor, that means you'll only need to wait about 3ms to get a stable voltage.
Mark.