If you remember your theory, the resistance times the capacitance is the RC constant. That is the time taken for the capacitor to charge up to about 2/3 of its final value. Under off conditions (after the capacitor has fully charged with A3 in the high state) the voltage at the gate will be at Vin. When you drive A3 low the voltage at the gate will immediately drop by Vcc, turning the FET on. You want this voltage to remain well below the gate threshold voltage to keep it on during the measurement (so that's at least 3ms plus the time to measure). As soon as measurement is made A3 can be driven back high which will immediately drive the gate to above Vin by the amount that it has been charged up with, turning the FET back off.
So you need an RC constant big enough. About ten times the time to measure should be OK, that'll guarantee the FET is hard on for the duration, thats RC = 0.03 (assuming you use 10nF and 10k/4k7 divider), so for your 10k pull-up that's a C of 3uF. I would probably use a 100k pull-up resistor instead of 10k and use a 330nF or 470nF to give roughly the same time constant. The procedure is then drive A3 low, wait 3ms, make the mesurement, and drive A3 back high.
Mark.