Author Topic: ADC input status during low power mode?  (Read 172 times)

DonpK

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ADC input status during low power mode?
« on: January 19, 2018, 10:07:37 AM »
I am using a voltage divider from Vcc to measure the battery voltage supplying a Moteino. The divider is used to reduced the ca. 5 volt Vcc value so the internal 1.1 volt reference can be used. This divided voltage is connected to an analog input.

Using the LowPower.powerDown(SLEEP_8S, ADC_OFF, BOD_OFF) function, the Moteino current is slightly higher during the sleep mode with the analog input left connected to the voltage divider. The additional current with the ADC connected depends on the size of the resistors in the divider. It can range from 1ľA with high-value resistors to 7 or 8 ľAs with lower value resistors.

What is the actual status of the analog inputs during the sleep mode? It would appear that it is not entirely an open circuit, but has some high impedance drawing current through the resistor divider.

Felix

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Re: ADC input status during low power mode?
« Reply #1 on: January 19, 2018, 10:17:29 AM »
Using the LowPower.powerDown(SLEEP_8S, ADC_OFF, BOD_OFF) function, the Moteino current is slightly higher during the sleep mode with the analog input left connected to the voltage divider.
Compared to ... it not being connected to the analog pin (divider still connected to battery)?

There is current leakage through the divider, regardless if it's connected through the analog pin or not.
I don't know the definite answer, but I think if the ADC is off, the pin should be HIGH-Z, in which case you should not see a leak through it, or negligible. You could also explicitly set the pin mode to INPUT (HIGH-Z).

DonpK

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Re: ADC input status during low power mode?
« Reply #2 on: January 19, 2018, 02:31:02 PM »
In a related discussion on the Arduino Forum, a writer comments that the ADC inputs have protective Schottky clamping diodes. This results in the following formula for current flowing into the A/D input:

            I ≈ (9V - 0.4V - Vcc)/Resistor

Plugging in either the higher or lower values of voltage divider resistors in my examples works out pretty close to the values I'm seeing.  With the Moteino in low power mode, the lower resistor of the divider is not grounded and the top resistor is connected to the battery supply, ≈ 4.6V, and to the ADC input through the diode (-0.4V) to the regulated Vcc, 3.3V. This results in about 1ľA through the 1meg top resistor.

BTW, I'm pleased that the 3.3v regulator in the Moteino apparently draws very little quiescent current in the low power mode helping to achieve the 7ľA I'm measuring.

Felix

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Re: ADC input status during low power mode?
« Reply #3 on: January 19, 2018, 02:38:39 PM »
BTW, I'm pleased that the 3.3v regulator in the Moteino apparently draws very little quiescent current in the low power mode helping to achieve the 7ľA I'm measuring.
It's ~2uA as long as the VIN is above the dropout value (about 0.3V but depends on load and other factors, there are graphs in the DS).

perky

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Re: ADC input status during low power mode?
« Reply #4 on: January 19, 2018, 06:34:24 PM »
You should explictly disable the input buffers for the ADC analogue inputs otherwise they can take excessive current when at an intermediate input voltage (is this done by the library?). I think deep sleep modes are supposed to disable them anyway but worth checking.

Mark.
« Last Edit: January 19, 2018, 06:41:08 PM by perky »

perky

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Re: ADC input status during low power mode?
« Reply #5 on: January 19, 2018, 07:01:47 PM »
With the Moteino in low power mode, the lower resistor of the divider is not grounded and the top resistor is connected to the battery supply, ≈ 4.6V, and to the ADC input through the diode (-0.4V) to the regulated Vcc, 3.3V. This results in about 1ľA through the 1meg top resistor.
So you connect the 'ground' pin on the lower resistor to an IO pin? Is that done to try to save power by turning the divider off? You might be better off using a high side switch using lower value resistors turned on for a very short length of time. The ADC input should also really see a source impedance of less than 10K to be accurate, if a cap is used to smooth it and provide a low impedance source the RC constant with such high value resistors may mean waiting a long time for it to settle.

Mark.

DonpK

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Re: ADC input status during low power mode?
« Reply #6 on: January 19, 2018, 07:53:33 PM »
I connect the voltage divider to ground through a transistor switched by a digital output pin from the Moteino. This is similar to what is used in the Lowpowerlab Weathernode example. This scheme produces a sleeping current of about 8ľA.

From what I read, the concern for keeping the ADC load impedance under 10k is when measuring higher frequency signals and not slowing changing DC which the battery supply is.

I'll look at your high-side switch suggestion, thanks.

perky

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Re: ADC input status during low power mode?
« Reply #7 on: January 20, 2018, 09:34:59 AM »
This is interesting. The external N-channel MOSFET I think is a little redundant as the IO pin is effectively a MOSFET and at such low currents would be grounded when it's on.

As long as the top resistor would source less current than the 3.3V power net itself would be sinking during sleep then I would have expected the total current from the battery to remain roughly unchanged because the regulator current would reduce by the same amount. You might measure current through the top resistor and maybe assume that adds to the total from the battery, but does it? Does that current simply get diverted from the regulator and the current remain the same?

The ADC has a sample and hold capacitor whose gate opens for a short time dependent on ADC clock speed. I normally try to get the ADC working at high speed to miminize the time the processor has to be awake, but in theory you could slow the ADC clock down and increase the conversion time so the gate open time is long enough. Since you have about 100 times the source impedance of 10k you'd need to slow the clock 100 times from it's maximum. Depending on what else you're doing you might even need to sleep or idle the processor during that conversion time.

The danger with the low side switching rather than high side switching is if the top resistor would source more current that the 3.3V power net would be sinking during sleep. In that case you risk the whole 3.3V net rising above 3.3V until the currents balanced.

Mark.

DonpK

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Re: ADC input status during low power mode?
« Reply #8 on: January 20, 2018, 06:11:00 PM »
I tried the switching the voltage divider at the high side and that reduces the supply current during the sleep mode. Depending on the value of the top resistor, with high side switching, the current reduction is between 6ľA and 1ľA versus low side switching of the divider. So with high side switching of the divider, the resistor values can be lowered to the 10k level going into the ADC mentioned above with no increase sleep current.

emjay

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Re: ADC input status during low power mode?
« Reply #9 on: January 20, 2018, 09:38:15 PM »
Have a look at this circuit for really tiny wasted draw from the battery:
https://jeelabs.org/2013/05/18/zero-power-measurement-part-2/

perky

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Re: ADC input status during low power mode?
« Reply #10 on: January 20, 2018, 10:31:34 PM »
I tried the switching the voltage divider at the high side and that reduces the supply current during the sleep mode. Depending on the value of the top resistor, with high side switching, the current reduction is between 6ľA and 1ľA versus low side switching of the divider. So with high side switching of the divider, the resistor values can be lowered to the 10k level going into the ADC mentioned above with no increase sleep current.
High side switching is best IMO. I'm still trying to work out why there was a signifiant increase in current when you had the low side switch though. The current will flow through the top resistor, through the substrate diode and into VCC, so the regulator won't need to supply as much current while still regulating to 3.3V. Where is this extra current going? Unless VCC is actually rising slightly, which it shouldn't be if the resistor's current is less than the regulator's current without the resistor fitted. I'm a little confused with your results there.

Mark.
« Last Edit: January 21, 2018, 10:39:53 AM by perky »