So the uCoulombs consumed can easily outweigh leaving the module initialised, but asleep - depending of course on the overall length of the desired sleep period.
If restart costs are prohibitively high for a 70s cycle you could add a larger cap for slower nodes or switch power to the radio using a mosfet, too. Actually there's really no good reason to keep the radio on during sleep if you need to restart it at the end of the cycle anyway.You could power the radio directly from the load switch and use a blocking diode to isolate the Moteino with Cap leaving them as the only load on the the cap. A larger cap wouldn't take much space either.
#include <SPI.h>
#include <RFM69.h>
#include <RFM69registers.h>
#include <LowPower.h>
#define SELECT ( 1 << 2 )
#define CUTPOWER ( 1 << 5 )
void setup()
{
// shut off ADC
ADCSRA = 0;
// shut off all units not needed
PRR = _BV( PRTWI ) | _BV( PRTIM0 )| _BV( PRTIM1 ) | _BV( PRTIM2 ) |
_BV( PRUSART0 ) | _BV( PRADC );
// Setup slave select
PORTB |= SELECT;
DDRB |= SELECT;
// set up SPI
SPI.begin();
SPI.setDataMode(SPI_MODE0);
SPI.setBitOrder(MSBFIRST);
SPI.setClockDivider(SPI_CLOCK_DIV2);
// Sleep radio
while( true ) {
PORTB &= ~SELECT;
SPI.transfer(REG_OPMODE | 0x80);
SPI.transfer(RF_OPMODE_SLEEP);
PORTB |= SELECT;
PORTB &= ~SELECT;
SPI.transfer(REG_OPMODE & 0x7F);
if( SPI.transfer( 0 ) == RF_OPMODE_SLEEP) break;
PORTB |= SELECT;
}
// cut power
PORTD |= CUTPOWER;
LowPower.powerDown( SLEEP_FOREVER, ADC_OFF, BOD_OFF );
}
void loop()
{
}
What do you plan to use for persistent storage so that you know how many cycles you've run before contacting your gateway? I'm assuming that you're not going to do that every power cycle.
ISTM, if you're giving up Listen Mode and restarting the proc/radio, then the RTC approach is not only much lower power, but also more accurate and much longer intervals between power ups. You do have to calibrate that RTC if you want accurate time keeping. It's good enough to be sufficiently accurate over a few hours(~200PPM), but needs calibration beyond that.
I guess I'm missing how you would integrate Listen Mode and this shutdown technique.
Also, maintaining a counter (or state information) in EEPROM could quickly wear it out unless you move it around using a load leveling technique.
I still prefer the RTC approach because it allows you to schedule when you want to go to listen mode, when you want to report on a scheduled post basis, or when you want to simply 'sleep' (AKA powered off) for months on end... It also has 256 bytes of battery backed up ram that you can use for persistent data. And, given its power management hooks, it's simple to attach to a P MOSFET or LoadSwitch depending on your power source.
If anyone is interested in this approach I might be able to post a reference design with just the proc, radio, and RTC
in a listen-mode with a very long sleep cycle (100na while asleep)
As the Moteino draws down the power from the cap it will reach the power-on reset threshold of 1.3V and trigger a reset. If you could then power up it up again the process would start from the beginning.
Cheers, Joe
Is it safe to run the atmega at 1.3v? I had thought anything lower than 1.8v was chancing corruption.
BTW, I wonder if two or three of these could be put in series to make a high efficiency charge pump?
started with 100uF caps for energy storage but later decided to upgrade to 470uF
The way to achieve voltage conversion with very high efficiency at ultra low currents is to only run the converter intermittently and smartly disconnect it in between.
Looks as though the WAKE pin on a TPL5010 could simply be wired to the !STDN pin on a LTC3531-3.3 (http://cds.linear.com/docs/en/datasheet/3531fb.pdf), used to charge the cap, and voilà. The WAKE pulse lasts 20ms, and the turn-on time for the LTC3531-3.3 takes less than 2ms, so it can buck/boost a solid 18ms per cycle with no need to wake the atmega.The TPL5010 doesn't produce a WAKE pulse without receiving a DONE pulse from the MCU - that's the watchdog interlock. It will produce a periodic RESET, but that's 320mS long.
shutdown LTC3531-3.3: 100nA
But what I meant with the tpl5010 being the simplest route to very low power is that you could just add it to an existing Moteino and have it provide the wakes. Drop the LDO, run from 2x aaa or coin and expend 280nA. Only takes one chip and doesn't require hugely restructuring your app. It's really simple.
I'm afraid the leakage current of the FETs might scupper this idea. The SI2356DS for example has 1uA max zero gate voltage drain current (Idss) at 25 deg C (admittedly at 40V), and this rises to 10uA at 40V for 55 deg C. It'll be less for lower voltages of course but it's still significant, and your 60M pull-up might not actually pull it up leaving the load switch FET permanently on. You are going to have to find ultra low leakage FETs I think.
Mark.
What is a REG02?
I'm afraid the leakage current of the FETs might scupper this idea. The SI2356DS for example has 1uA max zero gate voltage drain current (Idss) at 25 deg C (admittedly at 40V), and this rises to 10uA at 40V for 55 deg C. It'll be less for lower voltages of course but it's still significant, and your 60M pull-up might not actually pull it up leaving the load switch FET permanently on. You are going to have to find ultra low leakage FETs I think.
Mark.
It's almost like you really need supercaps to hold enough energy to do a full TX/RX cycle and only gradually top that up between cycles using much lower currents.
OK, back of a fag packet calculation:
Energy in a cap is C(V*V)/2. Let's assume you could have an allowable drop from 3.3V to 2V for a full transmission, which lasts 10ms and takes a constant current of 100mA.
We'll give a very worst case energy used during transmission and say that's at constant 3.3V (voltage is dropping from 3.3V to 2V so this is worst case). Energy is power times time, so that's 3.3*100e-3*10e-3, i.e. 3.3mJ. That has to be equal to the loss of energy in the caps, so:
C*(3.3*3.3)/2 - C*(2*2)/2 = 3.3e-3.
C = (2*3.3e-3)/(3.3*3.3 - 2*2), which is roughtly 958uF. So you're looking at 1mF at least as a ball-park.
Mark.
Edit: Also remember that to charge this cap up you'd ideally want to to do it in an energy efficient manner. Just using a resistor will waste power in that resistor due to the I^2R losses. So some buck-boost regulator might be needed, but one that uses very low current (possibly even a switched capacitor regulator, although I have no real idea how efficient that might be). Unless of course you simply keep it charged up continually by the source and use a load switch to isolate it while transmitting..