I had one concern with this.
When the reset pin goes low, because the fet's switching off
time is slew rate controlled, will this not create a discharge path
for the 3.3V to Ground even before the switch is turned off?
Is that not going to be a concern?
Also, note that the ON/OFF pin is already pulled up to the
the Vin to the fet and watchdog. And Vcc and Vin already
have the slew rate R1-C1 pair between them in series.
So as soon as the ON/Off pin is toggled low the
circuit becomes (check schematic)
_____________________--||--___________________________________
| 0.2uF |
| |
(Vcc@3.3V)_____/\/\10K/\/\____
(On/OFF @ 0V)_________/\/\10k/\/\___(Vin@3.3V)
So while the intention is to discharge Vcc, the .2uF cap will end up getting charged at
the same time. How will all this work out in the end?
personally would use a BAT54 (SOT23 package).
I need something smaller. Can I use this one:
BAT5402VH6327XTSA1