What do you all find is a good minimum trace width to use on these types of small modules? I'm going to take a crack at doing my first attempt at PCB design using diptrace, but I have no good feel for how wide is a wide enough trace width. Same goes for minimum space between traces.
Quote from: WhiteHare on September 09, 2016, 01:36:11 PM
What do you all find is a good minimum trace width to use on these types of small modules? I'm going to take a crack at doing my first attempt at PCB design using diptrace, but I have no good feel for how wide is a wide enough trace width. Same goes for minimum space between traces.
See what are the minimums allowed by your PCB manufacturer company. I just go by DRC file provided by iTead and use Autorouter (oh horrors! lol) in Eagle. If I have room on the board, I fatten up VCC traces to at least 16, but for such low voltage boards, it doesn't really matter that much. I only got screwed up once on a high voltage board I designed for my Nixie clocks. Never had issues with 5V or 3.3V boards...
I follow this reasoning:
I keep them as "large as reasonably acceptable", while keeping in mind the PCB fab rules. Most decent fabs now have at least a 6/6mil trace width spacing rule (meaning some may have 4mil). If you look at my products, usually the smallest you will find is 8/8mil. I would not go smaller because any issues would be hard to identify and I don't like to push the limits.
Also one of the things I like is to make boards visibly trace-debugabble, if needed. I also never ever go with black or any other mask/silk combo that obscures the traces to a point where it's hard to see them, makes debugging next to impossible. Yes dirt and crap gets on the films and boards can have shorts. Or sometimes you just make a proto then have to scrape paint off, cut traces and reroute with hookup wire to further work on that prototype, to avoid another trip to the fab and 2 weeks of wait.
Here are some of the disasters that can come back from the fab: https://www.flickr.com/photos/15304611@N03/albums/72157644705121944
Usually these come up during programming/testing.
Felix has a good point. I'd like to add one more thing. At all cost try to avoid traces near edges. My PCB manufacturer cut one off during panelizing cause it was too close to the edge. Only happened on one PCB out of 10 in same batch, but it had to the one I picked to test and assemble first. Can't tell you how many days it took me to finally figure out it wasn't working because of that stupid cut trace :)
When using autorouter, here's a trick I use. Shrink your board dimensional outline by at least .5mm, run autoroute, and then expand it back.
OSH Park will support 6/6mil width/gap, but I have been using 8/8mil since this works nicely with the small pads on 0.5mm pitch parts like AB18x5 RTC & various LGAs and is more than enough for moderate speed digital signals. For general circuits (ie not 0.5mm pitched parts), I'll try to stay at 10mil or above as I don't see a reason to push the limits when sometimes I'll go overseas to get boards fabbed.
I use 16mil minimum on VCC traces, with 24mil if I have room. And, of course, GND pour all over the place!
Re too close to the edge, OSH Park's Design Rules specifies a minimum distance for traces and pads to the edge of the board. I don't remember what it is but the Auto Router should take this into account and, even if it doesn't, Design Rule Check should flag it.
Tom
Thanks guys. Diptrace is going easier than I expected. Is it better to do the GND pour on both sides, or just one side? Also, what's the downside of not doing any GND pour at all?
Since I didn't hear back from anyone regarding the ground pour details, I decided to omit the ground pour on the first attempt that I sent to the fab. All I know is that whenever I prototype using actual wires soldered onto protoboard, there is no ground pour per se, and yet everything works fine.
If you do a lot of designs in single layer (top) then it's quite beneficial to use the bottom layer as the ground plain, decreasing noise & other hidden gremlins.
Voltage regulators & such produce heat, which can be dissipated with copper fills under the component, leaving the bottom layer for traces, vias under components can be used for passive cooling too.
Power/Ground traces thicker than signal traces makes it easier to identify.
I agree, I use a ground pour on the bottom layer. Components, mainly SMD, on top with fat tracked power with bulk decouplers placed around the board and high frequency decouplers on the power pins. The ground pour will decrease its impedance and allow return path currents to minimize loops and hence EMI (quite important in RF designs). The bottom layer can be used for tracking but the goal is to minimize that tracking and keep the pour as unbroken as possible.
Mark.