Hi mharizanov!
Very good question. I guess I need more motivating questions like this to get my attention out of my busy routines.
Thsi was never optimized and it generally works fine. In terms of battery power I can say that other hardware optimizations are far more important.
From my measurements, a 61byte packet takes around 10-12ms to transmit. So a good saving could be achieved here.
PacketSent interrupt is indeed available in Packet Mode on DIO0 (wired to Moteino pin D2, INT0).
As far as polling the register, I believe I implemented that "recently" because a digital read may perhaps miss the HIGH on DIO0.
BUT it would be a good opportunity to improve this. A new interrupt handler would probably be needed along with attach/detach while packet is sending. But at the very least sleeping with WDT is better than just actively polling for up to ~10ms.
Would that add weeks, months, years to a mote? Not sure, depends on many factors, how often and at what power it transmits, etc.
Any help in coding and testing this would be appreciated.
I would start with basic WDT sleep and go from there see below. Note this library is now supporting SAMD as well, so it needs some #ifdefs to sleep things properly in both platforms.
If you have working code and want to jump start this let me know.
EDIT: WDT sleep however has a downside, the lowest resolution is 15ms. So ... this has to be looked at in closer detail and evaluate what is the best approach. ListenMode sleep could sleep for less time but it cannot be used while the radio is in TX mode so its not an option.
See this forum post that talks about this and perhaps possible to trigger a WDT interrupt on counter match rather than overflow and thus achieve higher resolution (ex: 1ms sleep):
https://lowpowerlab.com/forum/low-power-techniques/how-to-do-put-the-mega-into-a-1-millisecond-low-power-sleep-mode/EDIT2: OK the interrupt approach is probably better than trying to sleep for low resolution times and poll in between.